1. Field of the Invention
The present invention relates to a novel semiconductor integrated circuit device comprising zapping Zener diodes besides P and N type MOS transistors, and to a Zener diode having a low breakdown voltage.
2. Background Art
There has been a growing need in recent years for semiconductor integrated circuit devices, comprising P type and N type MOS transistors, which incorporate resistance elements of very high precision that cannot be attained by a semiconductor wafer process. Such resistance elements with resistances of very high precision are produced conventionally by laser trimming in a test process following semiconductor wafer processing.
The laser trimming method will now be described with reference to FIGS. 22 through 24. In FIG. 22, reference character A represents a node on one side of a resistance element expected to offer a resistance of very high precision, and B denotes a node on the other side of the resistance element. A resistance of a very high precision is required between the two nodes.
Reference numeral 100 represents a resistance body which has a resistance R0, and one end of which is connected to the node A on one side of the resistance element. The resistance body 100 is a resistance constituted by a doped region at a principal surface of a semiconductor substrate including P and N type MOS transistors. Reference numeral 101 indicates a first adjusting resistance having a resistance R1 and connected between the resistance body 100 and the node B of the resistance element. The first adjusting resistance 101 is constituted by a doped region at the principal surface of the semiconductor substrate. In this example, the resistance R1 is set illustratively to 1/100 of the resistance R0 of the resistance body 100.
Reference numeral 102 represents a second adjusting resistance having a resistance R2, and one end connected to the resistance body 100. The second adjusting resistance 102 is a diffusion resistance constituted by a diffusion region at the principal surface of the semiconductor substrate. In this example, the resistance R2 is set illustratively to 1/100 of the resistance R0 of the resistance body 100. Reference numeral 103 represents a first fuse element F1 connected between the second adjusting resistance 102 and the node B. The first fuse element 103 is constituted by polysilicon or aluminum wiring on the principal surface of the semiconductor substrate.
Reference numeral 104 denotes a third adjusting resistance having a resistance R3, and connected to the resistance body 100. The third adjusting resistance 104 is a resistance constituted by a doped region at the principal surface of the semiconductor substrate. In this example, the resistance R3 is set illustratively to 1/100 of the resistance R0 of the resistance body 100. Reference numeral 105 denotes a second fuse element F2 connected between the third adjusting resistance 103 and the node B. The second fuse element 105 is constituted by polysilicon or aluminum wiring on the principal surface of the semiconductor substrate. Because the first and the second fuse elements 103 and 105 are polysilicon or aluminum wiring, their resistances are negligible compared with those of the resistance body 100 and of the first through the third adjusting resistances 101, 102, and 104.
How the resistances of the resistance element above are set will now be described. With the wafer processing completed, a resistance R00 between the node A and the node B is measured. The resistance R00 at this point is defined by the expression (1): EQU R00=R0+R1.multidot.R2.multidot.R3/(R2.multidot.R3+R1.multidot.R3+R1.multido t.R2) (1)
The setting is complete when the resistance R00 has reached a desired level.
If the desired resistance value has yet to be reached, the first fuse element 103 is cut, i.e., electrically opened, using laser light. With the first fuse element 103 cut, the resistance R10 between the node A and the node B is measured. The resistance value R10 at this point is defined by the expression (2): EQU R10=R0+R1.multidot.R3/(R3+R1)&gt;R00 (2)
The setting is complete when the resistance R10 has reached the desired level.
If the desired resistance value has yet to be reached, the second fuse element 105 is also cut using laser light. With the second fuse element 105 cut, a resistance R20 between the node A and the node B is measured. The resistance value R20 at this point is defined by the expression (3): EQU R20=R0+R1R&gt;R10&gt;R00 (3)
This completes the setting of the resistance. The resistance element should now have a resistance very close to the desired value (i.e., design value).
However, the trouble with the fine tuning of a resistance value outlined above is that the process requires the use of a laser trimmer, a large and expensive machine.